What is Brutus?
20.03.2002
– At the computer
chess tournament in Paderborn sharp-eyed program spotters discovered a new
name in the list of participants. Brutus. Not the guy who did in the
famous Roman emperor, but a spectacular new development in computer chess, a kind of new mini-Deep Blue, being developed by Dr Christian
Donninger. Currently
the program runs on an FPGA Virtex V405E board provided by Alpha Data Systems, Edinburgh.
You find all the details here
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Nigel Davies:
A busy person’s opening system
Players with interests and commitments away from the chess board often find it difficult to compete against those with more study time. Their opponents come to the board armed with the latest theory and can bash out moves well into the middle game. On this DVD Nigel Davies addresses this issue by demonstrating a simple and easy to learn opening system designed for the busy person.
More information...
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Dr Christian Donninger |
The acronym FPGA stands for Field Programmable
Gate Arrays, and the V405E development system contains one of these. It
is essentially a programmable chip. Dr Christian ("Chrilly")
Donninger is currently writing chess playing code for FPGA use. The advantage
is that anything programmed this way will run very much faster than on
a general purpose chip like the Pentium or Athlon.
An additional benefit of using FPGAs is that it is not
just the search routines that are speeded up dramatically. Due to the
sturcture of the code you can add chess knowledge in any quantity without
slowing down the process. In regular PC programs each new quantum of knowledge
is expensive – it is bought at the price of search speed. The FPGA
program does not slow down when you add new knowledge modules.
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The FPGA development board used by Chrilly Donninger
The Brutus project has been running for over a year now. Chrilly Donninger
has consulted all the leading experts in the field, and he is also cooperating
with a strong Russian GM. The tournament in Paderborn was the first public experiment
with the new system. The 50% score was quite satisfactory for a first experimental
version. Some of the games, e.g. the win over Diep, clearly demonstrated the
potential of the program.
Inserting the FPGA in a standard PC
| The hardware in Paderborn was supplied by Alpha
Data Parallel Systems Ltd., who are helping us in the development phase.
Dr Donninger's project is being funded by ChessBase, who hope to some time
in the future produce a commercial version of the FPGA program. Further
details will be supplied here as the project develops. |
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